JITTER TESTING FOR FIBRE OPTIC SYSTEMS
>> WHAT IS JITTER?
Jitter Speed Test is the short-term phase variations of the significant instants of a digital signal from their ideal positions in time. It is the deviation of the significant instants of a digital signal from the ideal, equidistant values. The significant instant can be any convenient, easily identifiable point on the signal such as the rising or falling edge of a pulse.
Otherwise stated, the transitions of a digital signal invariably occur either too early or too late when compared to a perfect square wave.
>> PROBLEMS CAUSED BY JITTER AND WANDER
1. Problems with Jitter
To accurately determine whether a given bit is a one or zero, the signal should be sampled at the instant in time where the vertical eye opening is maximum. This decision point is set by the recovered clock signal. If jitter on the data causes this point to move away from the optimised location, the decision margin decreases and the system Bit Error Ratio (BER) increases. So jitter can cause bit errors.
If the digital signal and the clock both have identical jitter, then the position of the sample instant does not change despite significant jitter error. Sampling still occurs properly, and no bit errors arise. Strictly speaking, however, this is the case only with low-frequency jitter for which the clock recovery circuit can keep up with digital signal phase variations with no problems. At higher jitter speed test frequencies, however, the clock recovery circuits cannot keep up with the fast phase variations of the digital signal. Phase shifts result, and for values > 0.5 clock periods (UI = Unit Interval), the result is incorrect sampling of the bit element and thus bit errors.
>> WHAT CAUSES JITTER? (JITTER TYPES)
1. Interference
Impulsive noise and crosstalk can produce phase fluctuations composed mainly of higher frequency components, thereby causing non-systematic (stochastic) jitter.
2. Pattern Jitter
Digital signal distortion leads to “inter symbol” interference, which is a sort of crosstalk interference between neighbouring pulses. Pattern-dependent systematic jitter is the result.
3. Frame Pattern Jitter
Frame pattern jitter is a phenomenon which can be assigned to the pattern dependent jitter generation. It is caused by the unscrambled part of the SONET/SDH frame. This phenomenon becomes more relevant with higher bit rate levels, such as OC-48/STM-16 or OC-192/STM-64, due to the increasing number of bytes of the unscrambled part.
Such intrinsic jitter may be generated in the transmitter and receiver e.g. in the clock recovery circuit. The characteristics of this kind of jitter is the repetition rate of 8 kHz and the correlation to the first row of the SOH of SONET/SDH frames.
4. Phase Noise
Although clock generators are usually synchronised to a reference clock in SONET/SDH systems, there are still phase fluctuations due to thermal noise or drift in the oscillators, for example. The faster phase variations caused by the noise lead to jitter, whereas the drift caused by temperature variations and ageing produces slower phase changes (wander).
5. Delay Fluctuations
Changes in the signal delay on a communications path result in corresponding phase fluctuations, which are generally relatively slow. For example, delay variations of this sort occur on an optical fibre due to daily temperature fluctuations. This generally results in wander.
6. Stuffing and Waiting Time Jitter
During multiplexing, asynchronous digital signals must be adapted to the transmission speed of the higher speed system by inserting stuffing bits or bytes.
The stuffing bits/bytes are removed during the demultiplexing process. The gaps which then occur are evened out by a smoothed clock. This compensation is never perfect, and the result is stuffing and waiting time jitters.
7. PDH Mapping Jitter
Plesiochronous and asynchronous signals are mapped into synchronous containers using stuffing techniques. At the next terminating multiplexer, the plesiochronous tributaries are then unpacked. Due to the stuffing that occurred, there are gaps in the recovered signal, which are compensated using PLL circuitry. There is still some leftover phase modulation, which is known as mapping or stuffing jitter.
8. Pointer Jitter
Clock differences between two networks or between SDH network elements are compensated by pointer movements.
These pointer jumps correspond to 8 or 24 bits, depending on the multiplex hierarchy. When the tributary signal is unpacked at the end point, the phase variations are still present but are smoothed out using PLL circuitry. The residual phase modulation is known as pointer jitter. Besides pointer jitter, the unpacked signal also exhibits mapping jitter, so the sum total of both, known as “combined” jitter, is always measured.
>> JITTER MEASUREMENT CATEGORIES
Both SONET and SDH standards specify the jitter requirements at the optical interfaces necessary to control jitter accumulation within the transmission system. The transmission equipment specifications are organised into the following categories: jitter tolerance, jitter transfer and jitter generation.
1. Jitter Tolerance
Jitter tolerance is a measure of how well the receiver can tolerate a jittered incoming signal. It is defined as the amplitude of applied sinusoidal jitter applied to an equipment input that causes a specified degradation in error performance. It is determined by measuring Bit Error Ratio (BER) in the presence of the applied jitter signal.
For telecom equipment, jitter tolerance is specified using jitter tolerance templates. Each template defines the region over which the equipment must operate while maintaining a better-than-specified BER. The difference between the template level and actual equipment tolerance curve represents the operating jitter margin, and determines the pass/fail status. Each transmission rate typically has its own input jitter tolerance template. In some cases, there are two templates for a given transmission rate to accommodate different regenerator types.
To perform a jitter tolerance measurement, a method for supplying data with known levels of jitter is required. A common technique for jitter tolerance testing is to attenuate the non jittered signal power until the onset of errors or a specific BER is obtained. The attenuation is reduced 1 dB and sinusoidal jitter is impressed on the data. SONET/SDH stands to call for specific jitter magnitudes and frequency ranges over which a compliance measurement is to be made.
The following figure is an example of a jitter tolerance measurement. The horizontal axis, logarithmically scaled, indicates the jitter frequency. The vertical axis, also logarithmically scaled, is the magnitude of the jitter. The solid line beginning at 15 UI at 10 Hz and ending at 0.15 UI at 20 MHz is the jitter input template. It indicates the minimum level of jitter vs. jitter frequency that SONET equipment must tolerate at the OC-48 data rate.
The test results are indicated at various jitter magnitude and frequencies. At each frequency point where a box appears, the BER remains within acceptable limits in the presence of jitter. At points where an X appears, the jitter tolerance threshold of the device or system under test has been exceeded.
> Measuring the Maximum Tolerable Jitter (MTJ)
The test set feeds a test signal modulated with sinusoidal jitter into the input of the network element (see the following figure). Error tests are performed on either the transmission or the tributary interface, depending on the network element configuration. If Remote Error Insertion (REI) is available, you can test the return line of the same interface, without a loop-back at the far end.
During the measurement, the jitter amplitude at various jitter frequencies is increased steadily until bit errors exceeding a specific value occur at the output of the network element.
The MTJ of the input under test is the Maximum Jitter Amplitude for which the output remains error-free.
The test set can measure MTJ using an automated algorithm so you can quickly and reliably record the entire measurement curve (involving many single tests). Successive approximation assures that the measurement results are reproducible and that the actual tolerance reserve compared with the limit curve is clearly determined. The instrument begins the test with jitter speed test amplitudes of 50 % of the tolerance value. Depending on the result, it then increases or decreases the amplitude by half of the set value until reaching the finest resolution, while allowing the network element a programmable recovery time between measurements.
2. Jitter Transfer
Jitter transfer is a measure of the amount of jitter transmitted from input to output of a regenerator. It is the ratio of the amplitude of the equipment’s sinusoidal output jitter to the applied sinusoidal input jitter.
Jitter transfer specifications help ensure that once installed in a system, the equipment won’t cause an unacceptable increase in jitter in any part of the spectrum. A cascade of similar units, each with just a small increase in jitter, could result in an unmanageable jitter level.
SONET/SDH specifications define allowable jitter transfer functions for various transmission rates and regenerator types. Jitter transfer requirements on clock recovery circuits allow a small amount of jitter gain up to a given cutoff frequency, beyond which the jitter must be attenuated.
The jitter transfer test is made by inputting data with specific jitter levels into the DUT (device under test) while simultaneously measuring the jitter on the recovered clock signal. Even though this is a ratio measurement, the input jitter levels generally follow those of the jitter tolerance template.
The following figure shows a jitter transfer measurement made on a OC-48/STM-16 clock recovery module. Once again the horizontal axis is jitter frequency. The solid line indicates the maximum allowable jitter level at a given frequency. The rectangular boxes indicate the measured jitter transfer at each jitter frequency. Failures, if they occur, typically occur near the bandwidth limit of the clock recovery circuit.
> Measuring the Jitter Transfer Function (JTF)
The test set feeds a test signal modulated with sinusoidal jitter to the input of the network element under test (see the following figure, this is a 2.5 Gb/s regenerator).
The highest possible jitter amplitude tolerable at the input is selected since a high amplitude results in a better signal-to-noise ratio and thus a more accurate measurement.
The jitter amplitude at the network element output is measured and the JTF calculated from this. The measurement is performed at a number of frequencies in the pass band and stop band. The accuracy can be impaired by spurious jitter away from the test frequency, particularly at lower amplitudes. Precise results can be obtained by reducing the spurious influences through narrow band selection of the test signal.
The test set has a measurement mode that goes through all the measurement points needed for a fully automatic JTF measurement. This test mode also includes a reference (calibration) measurement.
3. Jitter Generation (Intrinsic Jitter)
Jitter generation is a measure of the jitter at an equipment’s output in the absence of an applied input jitter. Jitter generation is essentially an integrated phase-noise measurement and for SONET/SDH equipment is specified not to exceed 0.01 UI root mean square (RMS) when measured using a high-pass filter with a 12 kHz cutoff frequency.
A related jitter noise measurement is output jitter, which is a measure of the jitter at a network node or output port. Although similar to jitter generation, the output jitter of the network ports is specified in terms of peak-to-peak UI over two different measurement bandwidths.
An additional jitter category is associated with synchronous transmission systems. Waiting time or justification jitter results from the bit stuffing process associated with frequency offsets resulting from mapping plesiochronous tributary data into the synchronous SONET/SDH formats. In addition, waiting time jitter can result from the payload mapping and pointer adjustments associated with the construction of SONET/SDH transported payloads.
> Measuring Intrinsic Jitter
Prior to installing network elements, it is important to measure the output jitter to assure that the maximum values are not exceeded. This helps avoid interoperability problems with other network elements as well as jitter-related transmission impairments (see the following figure).
There are separate standards for the output jitter of network interfaces, and compliance is important to assure that the jitter tolerance is not violated at any network interfaces. This type of test is particularly important when connecting links/paths between two different network operators. It should therefore be part of any standard acceptance procedure.
The values should be checked within specified jitter bandwidths. There are usually two jitter values: One for high-frequency jitter and one for broadband jitter.
The signal under test is connected to the test set’s receiver (above figure). The test set’s transmitter feeds an acceptable signal to the input of the device under test (DUT) in order to prevent an alarm from being triggered. The test duration is defined for 1 minute in some standards. The important parameter here is the maximum peak-to-peak jitter (UIpp) during the test interval.